VT-x vs VT-d vs SR-IOV Explained
Understand the difference between CPU virtualization (VT-x/SVM), I/O virtualization (VT-d/AMD-Vi/IOMMU), and SR-IOV. Which to enable or disable for GPU
π‘ Quick Answer: VT-x (CPU virtualization) and VT-d (I/O virtualization/IOMMU) are completely different technologies. You can disable VT-d (IOMMU) to fix GPU-Direct P2P issues without affecting containers β containers only need VT-x. SR-IOV specifically requires VT-d enabled.
The Problem
Three BIOS settings are often confused:
- VT-x β βdo I need this for containers?β
- VT-d β βcan I disable this for GPU performance?β
- SR-IOV β βwhy does this need VT-d?β
Disabling the wrong one breaks your cluster. Disabling the right one gives you GPU-Direct P2P at full speed.
The Solution
The Three Virtualization Technologies
Technology Full Name Layer What It Does
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VT-x / SVM CPU Virtualization CPU Hardware-assisted VM execution
(Intel VT-x / AMD-V SVM) Containers use this via namespaces
NEVER disable on K8s nodes
VT-d / AMD-Vi I/O Virtualization PCIe/DMA IOMMU β translates DMA addresses
(Intel VT-d / AMD-Vi) Isolates device DMA per VM/container
SAFE to disable if no SR-IOV/VMs
SR-IOV Single Root I/O Virt. NIC/PCIe Splits 1 physical NIC into N VFs
Each VF appears as separate device
REQUIRES VT-d enabledRelationship Diagram
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β BIOS β
βββββββββββββββββββββββββββββββββββββββββββββββββββββββββββββββ€
β β
β ββββββββββββββββ ββββββββββββββββ ββββββββββββββββ β
β β VT-x/SVM β β VT-d/AMD-Vi β β SR-IOV β β
β β (CPU layer) β β (PCIe/IOMMU) β β (NIC layer) β β
β ββββββββ¬ββββββββ ββββββββ¬ββββββββ ββββββββ¬ββββββββ β
β β β β β
β β β DEPENDS ON ββββ β
β β β β
βββββββββββΌβββββββββββββββββββΌββββββββββββββββββββββββββββββββ
β β
βΌ βΌ
βββββββββββββββ βββββββββββββββ
β Containers β β DMA Isolationβ
β VMs β β Device Pass- β
β KVM/QEMU β β through β
β cgroups β β SR-IOV VFs β
βββββββββββββββ βββββββββββββββ
VT-x: Required for containers and VMs (CPU instruction trapping)
VT-d: Required ONLY for DMA isolation / SR-IOV / VM device passthrough
SR-IOV: Requires VT-d (VFs need IOMMU address translation)What Each Technology Is Used For
VT-x / AMD-V SVM (CPU Virtualization):
ββββββββββββββββββββββββββββββββββββββββ
Used by:
β
Docker / containerd (via Linux namespaces/cgroups)
β
KVM / QEMU virtual machines
β
Kata Containers (microVMs)
β
Kubernetes (all Pod execution)
Disable? NEVER on a K8s/OpenShift node
Impact if disabled: Containers still work (they don't use VT-x directly)
but some runtimes (Kata) and all VMs will break
βββββββββββββββββββββββββββββββββββββββββββββββββββββββββββββββββ
VT-d / AMD-Vi (I/O Virtualization / IOMMU):
ββββββββββββββββββββββββββββββββββββββββ
Used by:
β
SR-IOV Virtual Functions (VF address translation)
β
VM device passthrough (GPU passthrough to VM)
β
VFIO (device assignment)
β NOT needed for standard containers
β NOT needed for GPU-Direct P2P (actually hurts it)
Disable? SAFE if you don't use SR-IOV or VM passthrough
Impact if disabled:
β’ GPU-Direct P2P works at full speed β
β’ Containers work perfectly β
β’ SR-IOV VFs will NOT work β
β’ VM device passthrough will NOT work β
βββββββββββββββββββββββββββββββββββββββββββββββββββββββββββββββββ
SR-IOV (Single Root I/O Virtualization):
ββββββββββββββββββββββββββββββββββββββββ
Used by:
β
Network VFs for Pods (high-performance networking)
β
RDMA VFs for GPU-Direct RDMA (inter-node NCCL)
Requires: VT-d/AMD-Vi ENABLED
Disable? If you don't need VFs (use host networking instead)
Impact if disabled: No Virtual Functions, Pods get regular veth interfacesDecision Matrix for GPU Clusters
Scenario VT-x VT-d SR-IOV ACS
ββββββββββββββββββββββββββββββββββββββββββββββββββββββββββββββββββββββ
Single-node training (no RDMA) ON OFF OFF N/A
β Max GPU-Direct P2P, simplest
Multi-node training with host NIC ON OFF OFF N/A
β NCCL uses host InfiniBand directly
Multi-node with SR-IOV RDMA VFs ON ON+pt ON Override
β VFs for Pods + GPU-Direct RDMA
Mixed (VMs + GPUs on same node) ON ON+pt ON Override
β Full virtualization stack
Inference only (no P2P needed) ON ON ON Don't care
β Single GPU per Pod, no P2PBIOS Settings Summary
Bare-metal GPU training (no SR-IOV):
ββββββββββββββββββββββββββββββββββββββββ
VT-x / AMD-V: ENABLED (containers need it)
VT-d / AMD-Vi: DISABLED (removes IOMMU overhead + ACS)
SR-IOV: DISABLED (no VFs needed)
Above 4G Decoding: ENABLED (large BAR GPUs)
ACS: N/A (no IOMMU = no ACS enforcement)
Kernel args: (none needed, or intel_iommu=off)
ββββββββββββββββββββββββββββββββββββββββ
GPU training with SR-IOV RDMA:
ββββββββββββββββββββββββββββββββββββββββ
VT-x / AMD-V: ENABLED
VT-d / AMD-Vi: ENABLED (SR-IOV requires it)
SR-IOV: ENABLED
Above 4G Decoding: ENABLED
ACS: DISABLED in BIOS (or kernel override)
Kernel args: intel_iommu=on iommu=pt pcie_acs_override=downstream,multifunctionCommon Misconception
β WRONG: "Disable VT-x to improve GPU performance"
β VT-x is CPU-level. Has ZERO impact on GPU/PCIe performance.
β Disabling breaks Kata, KVM, and some security features.
β WRONG: "Containers need VT-d"
β Containers use Linux namespaces + cgroups, NOT IOMMU.
β VT-d is only for DMA address translation (device isolation).
β WRONG: "SR-IOV works without IOMMU"
β VFs need IOMMU to translate their DMA addresses.
β Without VT-d, pci_enable_sriov will fail.
β
RIGHT: "Disable VT-d (not VT-x) to fix GPU-Direct P2P"
β IOMMU off = no DMA translation = direct P2P between GPUβGPU/NIC
β Containers still work perfectly (they don't use IOMMU)
β You lose SR-IOV capability (acceptable if using host networking)Verify Current State
# Check VT-x status
grep -E "vmx|svm" /proc/cpuinfo | head -1
# vmx = Intel VT-x enabled
# svm = AMD-V enabled
# Check VT-d / IOMMU status
dmesg | grep -i -E "DMAR|AMD-Vi|IOMMU"
# "DMAR: IOMMU enabled" = VT-d active
# Nothing = VT-d disabled
# Check SR-IOV VFs available
lspci | grep "Virtual Function"
# Lists VFs if SR-IOV enabled + VFs created
# Quick status script
echo "=== Virtualization Status ==="
echo -n "VT-x/SVM: "
grep -qE "vmx|svm" /proc/cpuinfo && echo "ENABLED β
" || echo "DISABLED β"
echo -n "VT-d/IOMMU: "
dmesg 2>/dev/null | grep -qi "IOMMU enabled\|AMD-Vi init" && echo "ENABLED" || echo "DISABLED"
echo -n "SR-IOV VFs: "
lspci 2>/dev/null | grep -c "Virtual Function"Common Issues
Disabled VT-d but SR-IOV stopped working
- Cause: SR-IOV requires IOMMU for VF DMA translation β this is expected
- Fix: Choose one: VT-d on (with ACS override) for SR-IOV, or VT-d off (use host NIC)
Containers broken after disabling VT-x
- Cause: Kata Containers or gVisor require hardware virtualization
- Fix: Never disable VT-x; disable VT-d instead for GPU performance
Confused by BIOS labels
- Cause: BIOS vendors use different names for the same thing
- Fix: Intel VT-d = Intel Directed I/O = IOMMU = DMAR. AMD-Vi = AMD IOMMU.
Best Practices
- Never disable VT-x on Kubernetes nodes β containers and security depend on it
- VT-d is safe to disable on dedicated GPU compute nodes (no SR-IOV needed)
- If you need SR-IOV VFs: keep VT-d on +
iommu=pt+ ACS override - Label nodes by capability β
gpu-direct: truevssriov: truefor scheduling - Document per-node BIOS profile β βwhy is VT-d off on these 8 nodes?β
- Separate node pools β SR-IOV nodes (VT-d on) vs bare GPU nodes (VT-d off)
Key Takeaways
- VT-x (CPU) β VT-d (I/O/IOMMU) β SR-IOV (NIC virtualization)
- Containers need VT-x, NOT VT-d β safe to disable IOMMU for GPU performance
- SR-IOV requires VT-d β you canβt have VFs without IOMMU
- Disabling VT-d removes IOMMU overhead AND eliminates ACS blocking
- The simple path for GPU training: VT-d OFF, SR-IOV OFF, use host InfiniBand directly
- If SR-IOV needed: VT-d ON +
iommu=pt+pcie_acs_override(slight overhead) - Never confuse VT-x with VT-d β disabling VT-x can break your cluster

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